ABB distributed control system UNS0887A-P 3BHE008128R0001 Programmable logic controller
Brand ABB color standard application Industrial height 118mm rated current 218mA
Protection Level IP45 Suitable for motor power 258KW Application Site Power Industry BOM Number GJR2391500R1220 Power industry HIEE401782R0001 Part Number UNS0887A-P 3BHE008128R0001
Applicable pipe 2 Whether imported is weighing 1.68 kg can be sold nationwide
ABB distributed control system UNS0887A-P 3BHE008128R0001 Programmable logic controller
Knowing when to read a word of this length is a problem. If this is a CPU software, we might poll this memory word. If the memory word is not zero, we know that a packet exists. However, this design is intended for hardware implementation. The hardware can poll memory at every clock cycle so that the writer doesn’t have any cycles left to write packets to memory. To prevent this, we need to specify a polling interval, which increases our latency. Supporting minimum latency requires different solutions.
My solution to this problem is to use an out-of-band communication scheme via the controller. In this scheme, the author tells the reader a pointer to the length word of the last committed packet. If the address does not match the reader’s last memory address, there is a packet that can be read. In another version of this FIFO, the CPU is in the middle, and the CPU provides the same pointer to the reader. Again, this tells the reader when it is safe to read the packet length counter for the next packet.
Once returned, the reader verifies the packet length word.
Zero is not allowed.
The packet length may not pass the write pointer. This will indicate memory overflow.
The packet length must be smaller than the memory size.
If anything goes wrong, we can reset the entire FIFO, or/or just discard all packets between our current position and the write pointer.
If the length pointer is good, we start reading from memory.
There are two challenges to this task. The first challenge is that memory is (usually) misaligned. The second challenge is that Wishbone has no concept of back pressure, which our output stream interface may require.
To handle misalignment, we need to keep track of previously read memory words. That plus the current memory word, both moved appropriately, we will produce an output stream word. The trick is that we may need to read an extra word to get all the outgoing stream data associated with this packet.
ABB distributed control system UNS0887A-P 3BHE008128R0001 Programmable logic controller
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